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NXP Semiconductors /MIMXRT1062 /SystemControl /ID_DFR0

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Interpret as ID_DFR0

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31282724232019161512118743000000000000000000000000000000000000000000 (DEBUGMODEL_0)DEBUGMODEL

DEBUGMODEL=DEBUGMODEL_0

Description

Debug Feature Register

Fields

DEBUGMODEL

Support for memory-mapped debug model for M profile processors

0 (DEBUGMODEL_0): Not supported

1 (DEBUGMODEL_1): Support for M profile Debug architecture, with memory-mapped access.

Links

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Register License

Copyright 2016-2019 NXP All rights reserved.

SPDX-License-Identifier: BSD-3-Clause

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data